FPGA Design Engineer

Project overview

An FPGA Design Engineer is required for a long term contract assignment on site Stevenage (preferred) Bristol (considered)

For this role, we are seeking an experienced FPGA design and verification engineer (~4+ years), to support the development of our growing portfolio of complex FPGA projects. The current portfolio ranges from advanced signal processing systems (Image/Radio), core Embedded processing systems, through to safety & security critical systems.

Responsibilities

The role involves working at all phases of the FPGA design and verification cycle; hence, the candidate would be responsible some of the following key activities:

Skillset/experience required:

Modis International Ltd acts as an employment agency for permanent recruitment and an employment business for the supply of temporary workers in the UK. Modis Europe Ltd provide a variety of international solutions that connect clients to the best talent in the world. For all positions based in Switzerland, Modis Europe Ltd works with its licensed Swiss partner Accurity GmbH to ensure that candidate applications are handled in accordance with Swiss law.

Both Modis International Ltd and Modis Europe Ltd are Equal Opportunities Employers.

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• Generating complex FPGA architectures and design implementations (VHDL, Simulink etc), targeting Xilinx, Intel, Microsemi devices.
• Verifying complex FPGA implementations using VHDL and System Verilog/UVM test-bench methodologies.
• Using FPGA design toolsets and Mentor verification tools (QuestaSim & ModelSim).
• Generating low-level software (C) to facilitate FPGA test and integration with the wider Embedded system.
• Configuring and Documenting designs to a high professional standard.
• Working as part of a multidiscipline team to deliver complex FPGA based projects.
• Ideally we are looking for candidates that are Degree qualified (or equivalent) with significant experience in FPGA development.
• Competent VHDL Language and Design Skills.
• Competent Verification Skills using VHDL and SystemVerilog methodologies
• A deep proven level of experience designing for Xilinx, Intel or Microsemi FPGAs
• Experience of professionally configuring and documenting designs
• Experience of working as part of a large multidiscipline team

Project details

• Start: asap
• Duration: 12 months
• Remote: onsite
• Location: Stevenage, UK, GB
• Languages: English