Geforderte Skills
- VHDL
- FPGA Design
- Xilinx Vivado
- Timing Closure
- Hardware Debugging
- FPGA Synthesis
- TCP/UDP
- Ethernet
- PCIe
- DMA
- Python
- Linux
Nice to have:VerilogLow-Latency Systems
Sprachen: English
Jobbeschreibung
Project overview
Senior FPGA Engineer - Contract | London (Hybrid)
Outside IR35 | 6 months | Competitive Day Rate
We're looking for an experienced Senior FPGA Engineer to join a high-performance engineering team developing ultra-low-latency FPGA solutions for the financial sector.
This is a hands-on role working on complex FPGA designs, high-speed networking and hardware acceleration.
What we're looking for:
- 5+ years' commercial FPGA design experience
- Strong VHDL and/or Verilog development skills
- Experience with AMD/Xilinx Vivado, synthesis, timing closure and hardware debugging
- Knowledge of high-speed networking protocols including TCP/UDP, Ethernet, PCIe and DMA
- Python and Linux experience for testing and automation
- Experience with low-latency systems, ideally within financial trading, capital markets or telecommunications
Project details
London area - Hybrid
6-month initial contract
Outside IR35
Competitive day rate
- Start: Immediate
- Duration: 6 months
- Remote: hybrid
- Location: London, UK, GB
- Languages: English
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