FPGA Developer VHDL and Simulation

Project overview

We are looking for an experienced FPGA developer to support the implementation and testing of digital circuits on an Altera FPGA platform.

Responsibilities

Implementation: You will develop concepts for realizing given requirements, document design decisions, and create or adapt VHDL modules. You will then integrate these into the existing FPGA design.

VHDL Simulation: You will develop test concepts and test sequences, set up automated simulation tests with QuestaSim, and expand them with the goal of complete code coverage.

Integration Tests: You will develop test sequences for the hardware platform, set up automated integration tests with a Python test framework on a real, remotely accessible hardware platform, and adapt them. If necessary, you will extend the test framework with additional functions.

Requirements

Fluent in German and English.

The project runs for four months and offers the opportunity to work on demanding technical challenges in the field of digital hardware development.

• Sound knowledge in FPGA development with Altera Quartus
• Confident use of QuestaSim/ModelSim and coverage analysis
• Good programming skills in Python 3 and Bash scripting
• Experience with the VUnit framework for automated simulations
• Knowledge in version control (SVN) and documentation systems
• Familiarity with Azure DevOps

Project details

• Start: 04.01.2027
• Duration: 4 Monate
• Location: DE
• Languages: German