Hardware Development Engineer (CPU/Memory architecture)

Project overview

Hi Associate,

Greetings for the day,

We have a position as a Hardware Development Engineer (CPU/Memory architecture) role in Cupertino, CA (or) Seattle, WA (or) Austin, TX. Please find the job description below for this position.

Role: Hardware Development Engineer (CPU/Memory architecture)

Responsibilities

Looking for a customer-obsessed, team-driven technology leader to take our engineering of server hardware and software to the next level.

As a server performance leader, you ll work on the hardest problems, building high quality, architecturally sound systems that are aligned.

You will interact with internal and external interdisciplinary teams of engineers to design, develop, validate, launch, monitor and troubleshoot at large scale, ensuring servers are operating at maximum performance while staying within thermal budgets.

You will work closely with CPU/GPU suppliers to align and influence roadmaps, driving future architectures.

This is a fast-paced, intellectually challenging position.

Requirements

Education:

Bachelor's or Master s degree in Computer Science, Computer or Electrical Engineering, Mathematics, or a related field.

Thanks & Regards

RAJU REDDY |Sr. Team Manager

CIS Technology Inc

Plano, TX 75074

Direct:

Job Facts: Contract Independent | Contract W2 | 24 Months | On-site | Depends on Experience

Skills: CPU, Memory architecture

Reference: Dice Id: 91114999 | Position Id: 9118074

• 5+ years of experience identifying & root-causing HW/SW issues in large scale systems
• 5+ year of experience with customer support for successive debugging/root-causing CPU performance issues
• 5+ years of experience in CPU/memory architecture and subsystem design.
• Experience in developing functional specifications, design verification plans and functional test procedures.
• Master's degree in electrical engineering, computer engineering, or equivalent
• 5+ year of experience with new CPU technology bring up
• 5+ years of experience with statistical analysis using large scale data
• 5+ years of experience with leading memory standardization through JEDEC, CPU architecture, RAS, DDR Memory technology, system performance, security and troubleshooting
• Repeated success leading architecturally significant projects from inception through launch, including communicating with users, other technical teams, and management to collect requirements, describe product features, and produce technical designs
• Excellent communication skills, both written and verbal.

Project details

Cupertino, CA or Seattle, WA or Austin, TX

24 Months

• Start: flexible
• Duration: 24 Months
• Remote: onsite
• Location: Austin, TX, US, US